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 0. CMOS inverter


- 설계 목표



- MOSFET 구조




- SiO2를 활용해 절연시킨 형태


 1. 풀이


다양한 방식으로 PMOS 설계가 가능하겠지만, 이왕 깊이있게 반도체를 공부하는 겸 3가지 방법으로 설계를 진행해보자.


- 1Sub-1well (Single Well)

- 1Sub-2well (Twin Well)

- Retrograde Well Process

- 장점

 1) High packing density

 2) Lower leakage current

 3) Lateral diffusion of Boron is eliminated, reduce Boron encroachment into active

 4) Higher field device threshold voltage due to less Boron segregation into oxide



- Conventional Well vs Retrograde Well

 1) Very low thermal budget for the well formation (No need for the diffusion drive-in)

 2) Retrograde well is formed AFTER field oxidation - small lateral diffusion & localized high concentration under the Field oxide





 2. 소스코드


https://colorscripter.com/


 3. 참고


Microelectronic Circuits; 7E


- magic tool을 이용한 CMOS inverter 설계
https://m.blog.naver.com/PostView.nhn?blogId=heyinho&logNo=220307909137&proxyReferer=https:%2F%2Fwww.google.com%2F


- CMOS 설명

https://news-skhynix.tistory.com/1603


- CMOS layer 구성

https://m.blog.naver.com/PostView.nhn?blogId=parkppjjmm&logNo=221489462597&proxyReferer=https:%2F%2Fwww.google.com%2F


- CMOS Manufacturing

http://bwrcs.eecs.berkeley.edu/Classes/icdesign/ee141_s02/Lectures/Lecture5-Manufacturing.pdf


- 더 상세한 CMOS Manufacturing

http://portal.unimap.edu.my/portal/page/portal30/Lecture%20Notes/KEJURUTERAAN_MIKROELEKTRONIK/Semester%202%20Sidang%20Akademik%2020172018/EMT%20367%20Microelectronic%20Fabrication/Lecture%20Notes/Lecture%204%20CMOS%20Well%20Technology_201718.pdf


- CMOS 설계 중 front-end process

https://indico.cern.ch/event/48132/attachments/956631/1357652/Faccio_ESEsem_ULSI.pdf


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